RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

Qualcomm and Google have partnered to develop a RISC-V wearable solution for use with smart watches based on the Wear OS by Google. The companies announced an expansion of their partnership to develop ...

MIPS, a GlobalFoundries company, today unveiled details of the MIPS S8200 processor IP to enable next-generation AI workloads ...

We’ve been following the open, royalty-free RISC-V ISA for a while. At first we read the specs, and then we saw RISC-V cores in microcontrollers, but now there’s a new board that offers enough ...

SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the founder and leader of RISC-V computing, today announced it has been selected by NASA to provide the core CPU for NASA’s next generation ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

OrangePi RV2 uses RISC-V CPU architecture, an alternative to x86 and ARM. RV2 offers 8-core Ky X1 RISC-V AI CPU, with 2TOPS ...

SHENZHEN, China & ROCHESTER, Mich.--(BUSINESS WIRE)--Seeed and BeagleBoard.org® have announced an official collaboration with the leading RISC-V solutions provider, StarFive, to create the latest ...

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Want a good tech job? Then you need to know Linux and open-source software. One of the best ways to learn is via a Linux Foundation course. With the recent rise of interest and deployment of RISC-V ...