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The last supported version of HP-UX is no more

Remember when HP made its own CPUs and Unix? We wonder if it does The final version of HPE's own flavor of Unix, HP-UX 11i v3 ...

QEMU 10.2 is faster under I/O load and "safer" thanks to new policy

QEMU 10.2 revises security policies, modernizes the crypto subsystem, and accelerates asynchronous I/O under Linux.
Guru3D.com

India introduces DHRUV64, a homegrown 64-bit dual-core RISC-V CPU

India has formally introduced DHRUV64, a 64-bit, dual-core microprocessor based on the RISC-V instruction set, developed by the Centre for Development of Advanced Computing (C-DAC) under the national ...
New Electronics

Qualcomm acquires Ventana Micro Systems to boost RISC-V CPU development

Qualcomm has announced the acquisition of Ventana Micro Systems, a move aimed at strengthening its CPU portfolio through advanced RISC-V technology. Qualcomm boosts CPU development with acquisition ...
Design-Reuse

Qualcomm Acquires Ventana Micro Systems, Deepening RISC-V CPU Expertise

The acquisition reinforces Qualcomm's commitment and leadership in the development of the RISC-V standard and ecosystem. Ventana’s expertise in RISC-V instruction set development enhances Qualcomm’s ...
Digi Times

Qualcomm acquires Ventana Micro Systems to strengthen RISC-V CPU capabilities

Qualcomm has acquired Ventana Micro Systems Inc., a move aimed at bolstering its capabilities in the RISC-V instruction set architecture (ISA) and custom CPU development. The acquisition integrates ...
Design-Reuse

RISC-V: The Open-Source Revolution in CPU Architecture

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...
Business Wire

proteanTecs and Akeana Announce Joint Initiative to Drive Next-Generation RISC-V Processor Performance

HAIFA, Israel & SANTA CLARA, Calif.--(BUSINESS WIRE)--proteanTecs®, a global leader in deep data solutions for electronics health and performance monitoring, and Akeana, a provider of high-performance ...
Morningstar

proteanTecs and Akeana Announce Joint Initiative to Drive Next-Generation RISC-V Processor Performance

proteanTecs®, a global leader in deep data solutions for electronics health and performance monitoring, and Akeana, a provider of high-performance RISC-V processor IP, today announced their ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
The Next Platform

Condor Technology To Fly “Cuzco” RISC-V CPU Into The Datacenter

Once a hyperscaler or a cloud builder gets big enough, it can afford to design custom compute engines that more precisely match its needs. It is not clear that the companies that make custom CPUs and ...