IEEE

A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS

Abstract: This article proposes an analog low-dropout (LDO) regulator using the voltage-to-time conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages of less than 1 ...
IEEE

A 0.5–1-V Time-Voltage Hybrid Domain Dual- Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm

Abstract: This article presents a time and voltage hybrid domain (HD) nested dual-loop analog low-dropout (LDO) regulator that achieves both wide-frequency-range high power supply rejection (PSR) and ...
GitHub

InfluxDB 3 Java Client

The Java client that provides an easy and convenient way to interact with InfluxDB 3. This package supports both writing data to InfluxDB and querying data using the FlightSQL client, which allows you ...