IEEE

A RISC-V-Based High-Throughput Accelerator for Sparse Winograd CNN Inference on FPGA

Abstract: This letter proposes a RISC-V-based accelerator for inferring a model that uses efficient sparse Winograd convolutional neural networks. This accelerator consists of a RISC-V processor ...
The Register on MSN

The last supported version of HP-UX is no more

Remember when HP made its own CPUs and Unix? We wonder if it does The final version of HPE's own flavor of Unix, HP-UX 11i v3 ...
IEEE

A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

Abstract: This letter presents a flexible and energy-efficient RISC-V system-on-chip (SoC) in 22nm FinFET technology, achieving state-of-the-art performance by tightly integrating the CPU with a ...
TechRadar

Arm sheds billions in market capitalization after Qualcomm hints at RISC-V adoption with Ventara Micro acquisition

Arm’s valuation drops massively as investors react to Qualcomm’s shift toward RISC-V development Qualcomm’s Ventana acquisition prompts concerns about future Arm demand Market response reflects ...
GitHub

Mojo-V: Secret Computation for RISC-V

Mojo-V (pronounced “mojo-five”) is a new RISC-V extension that introduces privacy-oriented programming capabilities for RISC-V. Mojo-V implements secret computation, enabling secure, efficient, and ...